The StudioXE development environment accelerates every stage of System-On-Chip (SoC) design. From architectural exploration to synthesis, StudioXE provides an array of graphical and command line tools that provide SoC architects and designers a single environment within which the entire SoC can be assembled, configured, simulated, and final netlist generated.

Using Sonics' line of advanced on-chip network IP products, designers can instantiate all of the SoC cores, configure their interconnect, create functional models for those IP cores not yet available, place monitors, stimulate the SoC components and analyze the resultant performance of the interconnect using either SystemC or RTL. Within minutes, changes can be made to the interconnect, or the whole SoC can be re-architected for subsequent analysis. In this way, SoC architects can rapidly decide on the optimal SoC architecture that meets design and customer requirements.

StudioXE streamlines physical integration and validation for SoCs that incorporate Sonics On-chip Network solutions. Seamlessly integrated with tools for simulation, design, synthesis, and timing analysis, StudioXE eliminates time consuming design work by automating synthesis script and constraint creation, timing analysis input preparation, and design-for-test management.

Product Brief